I took the opportunity of a long flight from San Francisco to London to read the Zynq Book. It does not cover much on the FPGA front, but it’s a good introduction to the platform nonetheless. Next, I will buy a ZedBoard to complete its set of practical exercises. This should give me a good introduction to FPGA development.
As a sidenote, after having read that book, I am more convinced than ever that we should build the ISHIZENO i8 on top of the Zynq platform. One of the reasons for this choice is the fact that the two ARM cores are very tightly integrated with the FPGA fabric, with over 1,000 connections. Trying to replicate something like that with discrete CPU and FPGA components would be pure folly.
Also, I am starting to really appreciate the benefits offered by the new Zynq UltraScale+ architecture. What’s particularly interesting is the Dual-core ARM Cortex-R5 RPU, which is a real-time processing unit, complementing the more traditional Quad-core ARM Cortex-A53 APU. The latter will be used for driving the user interface, but the former could be used for coordinating all signal processing. This will make software development a bit more complex, but it should give us a fully real-time platform.
Another improvement of the UltraScale+ architecture is the newer DSP48E2 DSP slice, which replaces the DSP48E1 found in the traditional Zynq architecture. Since most of our signal processing will be done with it, we will dive deeper into it very soon.
Unfortunately, the Zynq UltraScale+ won’t be available before the end of the year, or even early next year. In the meantime, we will do all our prototyping on the traditional Zynq platform, using the ZedBoard and a System-on-Module that has yet to be selected.