FPGA FIR Filtering

One of the most interesting developments that are currently taking place in the DIY hi-fi audio area is the Soekris dam1021, which is an FPGA-powered DAC. What makes it particularly interesting is the fact that all processing, including filters, is implemented using a small Xilinx FPGA, the Spartan-6 XC6SLX16. The excellent HiFiDUINO blog has a great post on the subject.

For the ISHIZENO i8, we will use a set of nine ES9018S devices for the core digital-to-analog conversion, but the filtering section largely remains an open issue. After having learned a little bit more about finite impulse response (FIR) filtering and reviewed the dam1021’s technical details, I believe that we should handle it in the PL section (FPGA fabric) of the Zynq.

But in order to do so, we will need to ensure that we can get enough DSP slices out of the Zynq. Fortunately, this should not be a problem. The Spartan-6 XC6SLX16 found in the dam1012 DAC packs 32 DSP slices. These are the DSP48A1, which are significantly less powerful than the DSP48E1 found in the Zynq. And the Zynq UltraScale+ uses the DSP48E2, which are even more powerful. And it packs a mind-blowing 3,528 of them…

In other words, we will have 100 times more DSP slices to our disposal than the dam1021 has, and ours will be a lot more powerful. Therefore, while the dam1021 only has to drive 2 channels, we should not have any problems driving our 16 audio inputs, 18 audio outputs, 16 CV inputs, and 16 CV outputs, with at least twice as many DSP slices per channel.



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