Regulator Diagram

Screen Shot 2015-04-27 at 2.49.02 PM

Here is what our power regulator boards will look like. We will be using the ADM7150, but the input, output, and intermediate VREG lines will use a trio of capacitors mounted in parallel, instead of a single capacitor. Each line will have a 100μF tantalum capacitor, a 10μF XR7, and a 100nF C0G. This should help achieve the best possible results. Also, the two capacitors connected to the bypass line will be adjusted in order to tune the system. During the development phase, this tuning will be achieved by using some additional jumpers that will be removed on the final boards in order to make them as small as possible.

I’m really, really happy to have this part figured out…


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