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Clock socket

The Pulsar Clock used on the DAC part of our audio interface will be mounted on a DIP-14 socket, so that it can be upgraded easily. Now, we need to figure out the best way to drive it. Also, I’m not sure how the master clock’s signal should be dispatched to our 9 ES9018 digital-to-analog converters…

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Op-amps on all lines

As far as I can tell, many digital-to-analog converters do not include operational amplifiers on output lines. If you want them, you need to use this mod. Keeping with our no-limits approach, I’ve decided to add them to all our input and output lines. On the output side, the AD797 seems to be the default option with the ES9018, but I’m wondering if an OPA627 or OPA637 could be more suited.

In our initial design, the operational amplifiers will be used by default. But in future revisions, we will allow them to be by-passed, most likely by using some relays. This will be especially useful when connecting microphones to the analog audio inputs.

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XMOS architecture

Slowly but surely, I am starting to undertand how the XMOS multicore microcontroller could be put to good use in our architecture. Since we now have a totally balanced design with dedicated ADC and DAC converters for every audio input and output, it makes sense to pair them with dedicated microcontrollers. This would free up the Zynq from any audio interfacing work, while being able to control our 17 audio converters individually.

On the audio input side, both the XMOS device associated to any given stereo audio input and the Zynq MPSoC would be connected to the same ADC converter output. On the audio output side, the XMOS device and the Zynq would be connected to the same DAC converter input. This would give our mesh of 17 XMOS devices direct access to the raw digital audio inputs and outputs.

From there, the 17 XMOS devices (XLF210 most likely) would be connected to a larger XMOS device used as primary audio interface (XEF216 most likely). This interface would be implemented using this reference design, thereby providing the following features:

  • S/PDIF optical/coaxial input
  • S/PDIF optical/coaxial output
  • ADAT input and output
  • MIDI input and output
  • USB Audio Class 2.0
  • Gigabit Ethernet with AVB
  • Lightning

The XMOS devices would be connected to the Zynq in a couple of ways: first, we would use their JTAG interfaces in a daisy-chained fashion for programming; second, we would use dedicated I/Os on the XMOS and Zynq sides for exchanging digital audio signals between the two. In a perfect world, this would be achieved by implementing the xCONNECT protocol on the FPGA side. Bad news: this is far from trivial. Good news: we do not need it initially.

Last but not least, we would use a similar architecture for CV inputs and outputs, using one XMOS device for CV inputs, and another one for CV ouputs. These would be connected to the ADC converters (AD7606), DAC converter (AD5360) and Zynq MPSoC in a fashion similar to the one described above.

Learn more about the full project on its website.

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ATmega328 over SPI

After further consideration, I have decided to keep the ATmega328 microcontrollers for bargraphs, keypad, and portplate. But instead of connecting them over USB, I will use the Zynq’s SPI interface. This is made possible by the fact that we do not need a lot of bandwidth between the Zynq and these boards, nor a very low latency. As a result, it will remove the need for USB interfaces on the MCU side, and USB hubs on the MPSoC side. The SPI interface will be used both for programming the MCU (In System Programming) and for full duplex communication, using the Zynq as master.

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Regulator Diagram

Screen Shot 2015-04-27 at 2.49.02 PM

Here is what our power regulator boards will look like. We will be using the ADM7150, but the input, output, and intermediate VREG lines will use a trio of capacitors mounted in parallel, instead of a single capacitor. Each line will have a 100μF tantalum capacitor, a 10μF XR7, and a 100nF C0G. This should help achieve the best possible results. Also, the two capacitors connected to the bypass line will be adjusted in order to tune the system. During the development phase, this tuning will be achieved by using some additional jumpers that will be removed on the final boards in order to make them as small as possible.

I’m really, really happy to have this part figured out…

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Power regulators

One of the (many) challenges of the fully balanced design that we want for our 8 stereo inputs and 9 stereo outputs is the integration of fully isolated power regulators within our relatively small enclosure (351 × 268 mm).

After further review, it turns out that each stereo input needs 11 regulators, 7 for the ES9102C analog-to-digital converter, and 2 for each of the 2 input buffers. If we were to use the excellent ADM7150 and design a breakout board for it similar to the Pulsar Power, the smallest we could make it is about 20 × 20 mm, by removing the option of using a custom noise capacitor. Mounted next to each other on top of the audio interface board, the 88 breakout boards would take 220 × 160 mm, which is acceptable.

On the output front, things are a bit easier, since we only need 4 regulators per stereo output, of which we have 9. This will require 36 boards, which would take 180 × 80 mm. Conclusion: we should be able to fit everything, and power dissipation should not be an issue, since the ES9102C consumes less than 200mW, and the ES9018 requires less than 100mW.

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Updated website

Our website has been updated in order to reflect our latest design changes. No diagram yet, because I want to do a little bit more work on the way we will connect our ESS audio converters to our FPGA. And I’m still noodling about the XMOS microcontrollers.

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All about latency

After reading this article on FPGA-based audio synthesis and this paper about realtime GPU audio, I now realize that audio processing and sound synthesis are all about latency, rather than raw power. And short of developing a custom ASIC, nothing beats a good FPGA on the latency front.

With that in mind, I believe that the 16 CPU cores found in the Adapteva device of the Parallella board won’t do much for us, and that a single Zynq Z-7045 SoC would give us better performance than four Zynq Z-7020 devices, and would be a lot easier to use. In such a context, I have decided to replace the four Parallella boards by a single Zynq Z-7045 board (Mercury ZX1 for example). And down the road, we will upgrade to a Zynq UltraScale+ MPSoC, which will give us 5 times more system-level performance per watt.

To further simplify our design and reduce latency to the absolute minimum, we will attach the Zynq MPSoC to a series of XMOS XU208 microcontrollers, one for every stereo audio input (8), one for every stereo audio output (10), one for the 16 CV inputs, and one for the 16 CV outputs. In addition, we will use a slightly more powerful XEF216 with 128 I/Os to provide the following interfaces:

  • S/PDIF optical/coaxial input
  • S/PDIF optical/coaxial output
  • ADAT input and output
  • MIDI input and output
  • USB Audio Class 2.0
  • Gigabit Ethernet with AVB
  • Lightning

Each one of the 8 XU208 microcontrollers used for stereo audio inputs will be connected to an ES9102C ADC converter, while each one of the 10 XU208 microcontrollers used for stereo audio outputs will be connected to an ES9018 DAC converter, which will give us a perfectly balanced design. And the 20 microcontrollers will give us plenty of I/Os to control our keypad, bargraphs, and motorized faders. As a result, I think we’ll get rid of the good old ATmega microcontrollers as well.

This is a pretty radical redesign, but I think it’s for the best…

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