- 8 × ES9102C analog-to-digital converters
- 8 stereo channels (16 mono channels)
- Full 32-bit conversion
- Native sampling rate up to 384 kHz
- Balanced inputs (unbalanced inputs not required)
- Buffers for line inputs
- Headers for line inputs (no RCA or DB25 connectors)
- I²S outputs (S/PDIF not required)
- Connectors for I²S outputs to be defined
- Precision digital filters for tailoring response, including RIAA
- Minimalist controller (to be defined)
- Power supply regulators
The board should be no more than 125 mm wide, and no more than 210 mm long. In fact, limiting the length to 190 mm would be preferable. Also, the tallest components on the board should ideally be located on one half of the board, so that it would properly fit underneath another PCB that will be mounted at an angle.
The inputs should use headers instead of RCA or DB25 connectors, because we’re likely to add a dedicated printed circuit board for the backplate. This would allow us to decouple the development of our ADC and DAC boards from the development of our backplate and from the layout of our backplate connectors. This is especially important because the number of USB and RJ45 connectors exposed on the backplate is subject to change, depending on our ability to support the AVB and USB 3.0 protocols.
Ideally, each stereo channel should be exposed through its own I²S output. This is due to the fact that we will want to route a pair of stereo outputs to each of the four Parallella submodules that will be mounted on our backplane. We could also feed two stereo channels through a single I²S output, but it would not save many GPIO pins on the submodule, and having one I²S output per stereo channel could possibly improve performance by reducing bandwidth requirements on the submodules.
Power Supply Regulators
Ideally, all components for power supply regulation should be directly mounted on the ADC board, instead of being mounted on breakout boards. This design will help reduce the height of the ADC board, which needs to be mounted underneath another PCB within a fairly small enclosure.
Ideally, the ADC board should be fully self-contained, meaning that it could be connected to the PSU board and to the backplane with simple cables, and no other electronic components. Connectivity to the backplane will be achieved through a set of GPIO pins offered by the Xilinx Zynq-7020. Any component required for connecting the ADC board to the backplane should be directly added to the ADC board itself. This includes components that might be required for controlling the ES9102C converters and could not be provided by simply programming the Xilinx FPGA.