i8

Submodular Architecture

The recent changes that we have made to the ISHIZENO i8 are fundamentally altering its submodular architecture, in a few different ways. First, the internals of the system are a lot more digital than analog. Second, the submodules might become required rather than optional, because of the I/O limitations imposed by the Parallella (48 GPIO pins) compared to the Mars ZX3 (108 GPIOs). Third, we might not have one submodule per channel, but just one per pair of channels, this change being motivated by space constraints and the risk that having 8 Parallella boards within our small enclosure might lead to overheating.

As a result, the Parallalla boards should be considered as core parts of the architecture, rather than channel submodules, and purely analog sources for audio or CV signals should be produced by external components (Eurorack modules for example), taking advantage of the 32 inputs (16 audio and 16 CV) and 32 outputs (same split) offered by the system. With that model, we end up with a nicely hierarchical architecture:

  • 16 monophonic channels
  • 8 stereophonic channels
  • 4 processing submodules
  • 2 displays

From there, we have to answer the following questions: how do we route all our input and output signals to and from our four submodules, and how do we drive our UI components?

  • 1 dial
  • 2 displays
  • 8 knobs
  • 9 faders
  • 9 bargraphs
  • 40 leds
  • 46 buttons

While this is subject to change, here is how we’re thinking about it:

  • Left display driven by SM1 (Submodule 1)
  • Right display driven by SM4
  • Dial, transport buttons, and knobs driven by SM1
  • Faders, bargraphs, and mixing buttons driven by SM4
  • 2 audio ADC converters driven by each submodule
  • 1 audio DAC converter driven by SM2
  • 1 audio DAC converter driven by SM3
  • CV ADC converters driven by SM1
  • CV DAC converter driven by SM4

The benefit of such an architecture would be that all the heavy-duty signal processing work would be nicely distributed across all four submodules. The drawback would be that all four modules would be required, which is a major departure from our original design.

By the same token, only 4 submodules would be required instead of 8, and the volume pricing of the Parrallella board (embedded) is likely to be less than $200, making it relatively affordable. As a result, the four submodules be used as follows:

  • SM1: Upper controls and CV ADC
  • SM2: Audio DAC
  • SM3: Audio DAC
  • SM4: Lower controls and CV DAC

With such an architecture, the left display (connected to SM1) could show input CV signals while the right display could show output CV signals, without requiring any communication between submodules.

We will design our block diagrams according to this model.

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